1. Field of the Invention
This invention relates to a semiconductor integrated circuit device having an analog circuit and a digital circuit formed on one chip, and more particularly, to a semiconductor integrated circuit device capable of suppressing mutual interference between an analog circuit section and a digital circuit section caused by noise.
2. Description of the Related Art
A method of suppressing the mutual interference caused by noise in a semiconductor integrated circuit device is disclosed in Japanese Patent Publication No. 62-58668. In a C-MOS integrated circuit described in the above Japanese Patent Publication, for example, an analog circuit section is formed in an N-type semiconductor substrate and a P-type well region. On the other hand, a digital circuit section is formed in the N-type semiconductor substrate and another P-type well region. A P-type well region for noise absorption is formed in that part of the substrate which lies between the above circuit sections. The P-type well region for noise absorption is applied with a constant potential, for example, a ground potential. With the above construction, noise generated from the analog circuit section or digital circuit section is absorbed by the noise absorption well region. The transmission path for noise is cut off by the noise absorption well region and thus the mutual interference between the analog circuit and the digital circuit caused by noise can be suppressed.
However, in recent years, it has been known that noise is transmitted not only along the surface area of the semiconductor substrate, but also in a deep portion of the semiconductor substrate. With the construction disclosed in the above Japanese Patent Publication, since the noise absorption well region is formed in the surface area of the semiconductor substrate, noise which is transmitted in the deep portion of the semiconductor substrate cannot be sufficiently cut off.